EPM3064ALC44-7N vs EPM3032ALC44-10N Comparison

Detailed side-by-side comparison of EPM3064ALC44-7N by Intel and EPM3032ALC44-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3064ALC44-7N EPM3032ALC44-10N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $3.95 $0.94
Family MAX 3000A MAX 3000A
Logic IC Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 64 32
Logic Array Blocks (LABs) 2 2
Usable Gates 1,250 β€”
Number of User I/O Pins 34 β€”
Pin-to-Pin Delay (tPD) 7.5 ns β€”
Maximum Frequency 135.1 MHz β€”
Core Technology CMOS EEPROM β€”
Supply Voltage (VCCINT) 3.3 V 3.3 V
I/O Tolerance 5 V-tolerant β€”
In-System Programmability Yes (IEEE Std 1149.1 JTAG) Yes, via IEEE 1149.1 JTAG
Package 44-pin PLCC 44-pin PLCC (J-Lead, surface mount)
Mounting Type Surface Mount (PLCC socket compatible) Surface Mount
Operating Temperature 0C to +70C (commercial) [DATA_NEEDED: industrial/commercial range]
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: compliant or non-compliant]
Programming Software Quartus II / Quartus Prime (legacy MAX+PLUS II supported) β€”
Product Type β€” CPLD (Complex Programmable Logic Device)
Logic Gates β€” 600 gates
User I/O Pins β€” 34
Propagation Delay (tPD) β€” 10 ns
Internal fMAX β€” 103.1 MHz
I/O Voltage (VCCIO) β€” 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O)
Technology β€” CMOS EEPROM-based
ISP Standard Compliance β€” IEEE Std. 1532
Boundary-Scan Test (BST) β€” Yes, IEEE 1149.1 compliant

Datasheets & Resources

Browse All Products Create BOM Request Quote