EPM3064ATC44-7N vs EPM3064ATI44-10NAD Comparison
Detailed side-by-side comparison of EPM3064ATC44-7N by Altera and EPM3064ATI44-10NAD by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3064ATI44-10NAD - MAX 3000A 64-Macrocell CPLD 44-TQFP | Altera
EPM3064ATI44-10NAD ObsoleteSpecification Comparison
| Parameter | EPM3064ATC44-7N | EPM3064ATI44-10NAD |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $2.30 | $4.10 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Macro Cells | 64 | β |
| Logic Array Blocks | 2 | β |
| Usable Gates | 1,250 | 1,250 |
| User I/O Pins | 34 | β |
| Number of Pins | 44 | β |
| Speed Grade | -7 (7.5 ns pin-to-pin delay) | β |
| Pin-to-Pin Delay (tPD) | 7.5 ns | 10 ns |
| Maximum Counter Frequency | 192.3 MHz (-7 grade) | β |
| Supply Voltage (VCC) | 3.3 V | β |
| MultiVolt I/O | 1.8 V / 2.5 V / 3.3 V | β |
| Programmability | EEPROM, in-system programmable (ISP) | β |
| JTAG Interface | IEEE Std. 1149.1 compliant | β |
| ISP Standard | IEEE Std. 1532 compliant | β |
| Boundary-Scan Test (BST) | Built-in, JTAG-driven | β |
| Package | 44-pin TQFP | TQFP-44 |
| Operating Temperature | 0Β°C to +85Β°C (commercial) | -40C to +85C (Industrial) |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | Compliant | Compliant |
| Macrocells | β | 64 |
| Logic Array Blocks (LABs) | β | 4 (16 macrocells each) |
| User I/Os (max) | β | 34 |
| Setup Time (tSU) | β | 4.5 ns |
| Core Voltage (VCCINT) | β | 3.3 V |
| I/O Voltage (VCCIO) | β | 3.3 V or 2.5 V |
| Programming Interface | β | JTAG (IEEE Std. 1532 compliant) |
| In-System Programmable | β | Yes |