EPM3064ATI100-10N vs EPM3064ATC100-4N Comparison

Detailed side-by-side comparison of EPM3064ATI100-10N by Altera and EPM3064ATC100-4N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3064ATI100-10N EPM3064ATC100-4N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $9.80 $4.60
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Programmable Type In-System Programmable (ISP) via IEEE 1149.1 JTAG β€”
Technology CMOS EEPROM β€”
Usable Gates 1,250 1,250
Macrocells 64 β€”
Logic Array Blocks (LABs) 4 β€”
User I/O 66 β€”
Supply Voltage (Core / I/O) 3.3 V β€”
Pin-to-Pin Delay (tPD) 10 ns (-10 speed grade) 4.5 ns
Maximum Internal Frequency 227.3 MHz (counter) β€”
Package 100-pin TQFP (industrial) 100-pin TQFP
Operating Temperature -40 C to +85 C (industrial) 0C to +70C (commercial)
JTAG (IEEE 1149.1) Yes β€”
PCI Compliance PCI Local Bus Specification Revision 2.2 (-4/-5/-6/-7/-10 speed grades) β€”
MultiVolt I/O Supports 2.5 V / 3.3 V / 5 V mixed-voltage interfacing β€”
Lead-Free Status Contains Lead β€”
RoHS Status RoHS Non-Compliant [DATA_NEEDED: RoHS status]
Macro Cells β€” 64
Logic Array Blocks β€” 2
User I/O Pins β€” 66
Counter Frequency β€” 222.2 MHz (max)
Supply Voltage (VCCINT) β€” 3.3 V
I/O Supply Voltage (VCCIO) β€” 3.3 V or 2.5 V
Mounting Type β€” Surface Mount
Programming Interface β€” IEEE Std. 1149.1 JTAG (ISP)
ISP Standard β€” IEEE Std. 1532
Process Technology β€” CMOS EEPROM

Datasheets & Resources

Browse All Products Create BOM Request Quote