EPM3064ATI44-10N vs EPM3064ATC44-4N Comparison
Detailed side-by-side comparison of EPM3064ATI44-10N by Altera and EPM3064ATC44-4N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM3064ATI44-10N | EPM3064ATC44-4N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $3.95 | $3.45 |
| Family | MAX 3000A | MAX 3000A |
| Product Type | CPLD (Complex Programmable Logic Device) | β |
| Macrocells | 64 | β |
| Usable Gates | 1250 | 1,250 |
| User I/Os | 34 | β |
| Dedicated Inputs | 4 | 4 |
| Logic Blocks | 4 | β |
| Pin-to-Pin Delay | 10 ns (-10 speed grade) | β |
| Maximum Frequency (fMAX) | 100 MHz | β |
| Programmable Type | In-System Programmable (EEPROM) | β |
| ISP Interface | IEEE Std. 1149.1 (JTAG) | β |
| ISP Standard Compliance | IEEE Std. 1532 | β |
| Core Supply Voltage (VCCINT) | 3.3 V | β |
| I/O Supply Voltage (VCCIO) | 3.3 V or 2.5 V (MultiVolt) | 2.5 V or 3.3 V |
| Operating Temperature | -40C to +85C (Industrial, "N" suffix) | 0C to +70C (commercial) |
| Package | 44-pin TQFP | 44-pin TQFP |
| Process Technology | CMOS EEPROM | β |
| Boundary-Scan Test | Built-in (JTAG) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Lead-Free Status | Contains Lead (per digchip datasheet excerpt) | β |
| RoHS Status | Non-Compliant (per digchip datasheet excerpt) | [DATA_NEEDED: rohs status] |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Macro Cells | β | 64 |
| Logic Array Blocks | β | 2 |
| Number of I/Os | β | 34 |
| Propagation Delay (tpd) | β | 4.5 ns |
| Maximum Counter Frequency | β | 222.2 MHz |
| Supply Voltage (VCCINT) | β | 3.3 V |
| Programmability | β | EEPROM, in-system programmable (JTAG) |
| JTAG Support | β | IEEE Std. 1149.1 (boundary-scan) and IEEE Std. 1532 (ISP) |