EPM3064ATI44-10N vs EPM3064ATC44-4N 对比
详细并排对比 EPM3064ATI44-10N 出自 Altera 和 EPM3064ATC44-4N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM3064ATI44-10N | EPM3064ATC44-4N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $3.95 | $3.45 |
| Family | MAX 3000A | MAX 3000A |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 64 | — |
| Usable Gates | 1250 | 1,250 |
| User I/Os | 34 | — |
| Dedicated Inputs | 4 | 4 |
| Logic Blocks | 4 | — |
| Pin-to-Pin Delay | 10 ns (-10 speed grade) | — |
| Maximum Frequency (fMAX) | 100 MHz | — |
| Programmable Type | In-System Programmable (EEPROM) | — |
| ISP Interface | IEEE Std. 1149.1 (JTAG) | — |
| ISP Standard Compliance | IEEE Std. 1532 | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 2.5 V (MultiVolt) | 2.5 V or 3.3 V |
| 工作温度 | -40C to +85C (Industrial, "N" suffix) | 0C to +70C (commercial) |
| 封装 | 44-pin TQFP | 44-pin TQFP |
| Process Technology | CMOS EEPROM | — |
| Boundary-Scan Test | Built-in (JTAG) | — |
| 安装类型 | Surface Mount | Surface Mount |
| Lead-Free Status | Contains Lead (per digchip datasheet excerpt) | — |
| RoHS 状态 | Non-Compliant (per digchip datasheet excerpt) | [DATA_NEEDED: rohs status] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 64 |
| Logic Array Blocks | — | 2 |
| Number of I/Os | — | 34 |
| Propagation Delay (tpd) | — | 4.5 ns |
| Maximum Counter Frequency | — | 222.2 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| Programmability | — | EEPROM, in-system programmable (JTAG) |
| JTAG Support | — | IEEE Std. 1149.1 (boundary-scan) and IEEE Std. 1532 (ISP) |