EPM3064ATI44-7 vs EPM3064ATC44-7 Comparison

Detailed side-by-side comparison of EPM3064ATI44-7 by Altera and EPM3064ATC44-7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3064ATI44-7 EPM3064ATC44-7
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Family MAX 3000A MAX 3000A
Product Type CPLD (Complex Programmable Logic Device) —
Macrocells 64 64
Usable Gates 1,250 1.25K
User I/O 34 —
Logic Array Blocks (LABs) 4 (16 macrocells each) —
Propagation Delay (tPD) 7.5 ns —
Maximum Internal Frequency (fMAX) 135.1 MHz —
Supply Voltage (VCCINT) 3.0 V to 3.6 V —
Supply Voltage (VCCIO) 3.0 V to 3.6 V —
Process Technology 0.30 µm CMOS EEPROM CMOS EEPROM
Operating Temperature -40 °C to +85 °C (Industrial, 'I' suffix) 0C to +70C (Commercial)
Package 44-pin TQFP (TI44) TQFP-44
Mounting Type Surface Mount Surface Mount
In-System Programmability Yes, IEEE Std. 1532 compliant —
JTAG Support Yes (IEEE 1149.1) —
PCI Compliance Yes, speed grades -4/-5/-6/-7/-10 meet PCI SIG Rev. 2.2 —
RoHS Status [DATA_NEEDED: RoHS status] unknown
MSL Level [DATA_NEEDED: MSL level] —
Device Type — CPLD (Complex Programmable Logic Device)
Logic Array Blocks — 4
User I/O Pins — 34
Pin Count — 44
Speed Grade — -7 (7.5 ns tPD)
Pin-to-Pin Propagation Delay — 7.5 ns
Maximum Counter Frequency — 192.3 MHz
Supply Voltage (Core) — 3.3 V
I/O Logic Compatibility — 5.0 V / 3.3 V / 2.5 V (MultiVolt)
Programming Interface — IEEE Std. 1149.1 JTAG (ISP)

Datasheets & Resources

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