EPM3512AFC256-3N vs EPM3512AFC256-2N Comparison

Detailed side-by-side comparison of EPM3512AFC256-3N by Altera and EPM3512AFC256-2N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM3512AFC256-3N EPM3512AFC256-3N - MAX 3000A CPLD 512 Macrocells | Altera

EPM3512AFC256-3N - MAX 3000A CPLD 512 Macrocells | Altera

EPM3512AFC256-3N βœ“ Active

Specification Comparison

Parameter EPM3512AFC256-3N EPM3512AFC256-2N
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $23.40 $25.80
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 512 512
Usable Gates 10,000 β€”
Logic Array Blocks (LABs) 16 32
Maximum Operating Frequency 116.3 MHz [DATA_NEEDED: fMAX in MHz]
Pin-to-Pin Delay (tPD) 3.5 ns (speed grade -3) β€”
Speed Grade -3 (slowest in family) β€”
Core Supply Voltage (VCCINT) 3.3 V β€”
I/O Supply Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V (MultiVolt) β€”
Package 256-ball FineLine BGA (FC-256) 256-ball FineLine BGA (FC-256)
Mounting Type Surface Mount Surface Mount (BGA)
Programming Interface JTAG (IEEE 1149.1) / IEEE Std. 1532 ISP β€”
Configuration Memory Non-volatile EEPROM Non-volatile EEPROM
Operating Temperature [DATA_NEEDED: operating temperature grade] β€”
RoHS Status [DATA_NEEDED: RoHS compliance status] Compliant
Maximum User I/O Pins β€” 212
Propagation Delay (tPD) β€” [DATA_NEEDED: tPD in ns]
Process Technology β€” 0.30 Β΅m CMOS EEPROM
In-System Programmability β€” IEEE Std. 1532 JTAG
VCCINT (Core Supply) β€” 3.3 V
VCCIO (I/O Supply) β€” 2.5 V / 3.3 V / 5.0 V MultiVolt
PCI Compliance β€” 3.3 V PCI-compliant
Operating Temperature (Commercial) β€” 0 Β°C to +70 Β°C
Lead-Free β€” Yes

Datasheets & Resources

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