EPM3512AFC256C vs EPM3256AFI256-10 Comparison

Detailed side-by-side comparison of EPM3512AFC256C by Intel and EPM3256AFI256-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EPM3256AFI256-10 EPM3256AFI256-10 - 256-Macrocell CPLD, 10ns, FBGA-256 | Intel

EPM3256AFI256-10 - 256-Macrocell CPLD, 10ns, FBGA-256 | Intel

EPM3256AFI256-10 ⚠ Last Time Buy

Specification Comparison

Parameter EPM3512AFC256C EPM3256AFI256-10
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last Time Buy Last Time Buy
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 512 256
Logic Array Blocks (LABs) 16 —
Maximum User I/Os 208 —
Dedicated Input Pins 12 —
Package 256-ball FineLine BGA (FC) —
Operating Temperature 0C to +70C (Commercial) -40C to +85C (Industrial)
Speed Grade C (per datasheet ordering code) -10 (10 ns pin-to-pin)
Configuration Technology EEPROM (non-volatile, instant-on) —
Core Voltage 3.3 V —
I/O Standards Supported MultiVolt: 5.0 V, 3.3 V, 2.5 V —
JTAG Support IEEE 1149.1 Boundary Scan —
PCI Compliance PCI SIG Local Bus Specification Revision 2.2 —
Programming In-system programmable via JTAG —
RoHS Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS compliance status]
Mounting Type Surface Mount Surface Mount (BGA)
User I/Os — 161
Logic Elements / LABs — 16 Logic Elements per LAB
Propagation Delay (tPD) — 10 ns
Supply Voltage - Core — 3.3 V
I/O Voltage Support — 5.0 V / 3.3 V / 2.5 V (MultiVolt I/O)
Programmability — In-System Programmable (ISP) via IEEE 1149.1 JTAG
Process Technology — CMOS EEPROM
Package Type — FBGA-256 (FineLine BGA)

Datasheets & Resources

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