EPM3512AQC208-10 vs EPM3512AQC20-10 Comparison
Detailed side-by-side comparison of EPM3512AQC208-10 by Altera and EPM3512AQC20-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3512AQC208-10
EPM3512AQC208-10 - MAX 3000A CPLD 512 Macrocells | Intel/Altera
EPM3512AQC208-10 ObsoleteAltera
EPM3512AQC20-10
EPM3512AQC20-10 - MAX 3000A CPLD, 512 Macrocells | Altera
EPM3512AQC20-10 NrndSpecification Comparison
| Parameter | EPM3512AQC208-10 | EPM3512AQC20-10 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $22.10 | $21.10 |
| Family | MAX 3000A | MAX 3000A |
| Usable Gates | 10,000 | β |
| Macrocells | 512 | 512 |
| Logic Array Blocks (LABs) | 32 | 16 |
| User I/Os | 208 | β |
| Propagation Delay (tPD) | 7.5 ns | β |
| Maximum Frequency (fCNT) | 116.3 MHz | 116.3 MHz |
| Supply Voltage (VCCINT) | 3.3 V | β |
| Configuration Memory | EEPROM (non-volatile) | β |
| In-System Programmability | Yes (IEEE Std. 1532) | β |
| JTAG Boundary Scan | Yes (IEEE 1149.1) | β |
| PCI Compliance | PCI Local Bus Spec Rev. 2.2 (-10 speed grade) | β |
| Package | 208-pin PQFP | PQFP-240 (QC20 designation per Altera ordering code) |
| Operating Temperature | 0C to +70 C (commercial) | 0C to +70C (commercial) |
| RoHS Status | [DATA_NEEDED: RoHS status not in verified data] | Compliant (lead-free PQFP package) |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Macrocells per LAB | β | 32 |
| User I/O Pins | β | 100 |
| Pin-to-Pin Delay (tPD) | β | 10 ns |
| Supply Voltage VCCINT | β | 5.0 V |
| MultiVolt I/O Voltages | β | 5.0 V / 3.3 V / 2.5 V / 1.8 V |
| Programming Interface | β | IEEE 1149.1 (JTAG) - In-System Programmable |
| Process Technology | β | 0.30 Β΅m EEPROM CMOS |