EPM3512AQC208-15N vs EPM3512AQC208-10-10N Comparison
Detailed side-by-side comparison of EPM3512AQC208-15N by Altera and EPM3512AQC208-10-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3512AQC208-15N - 512-Macro CPLD MAX 3000A PQFP-208 | Altera
EPM3512AQC208-15N β Last Time BuyAltera
EPM3512AQC208-10-10N - MAX 3000A CPLD 512 Macrocells 208-PQFP | Altera
EPM3512AQC208-10-10N ObsoleteSpecification Comparison
| Parameter | EPM3512AQC208-15N | EPM3512AQC208-10-10N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $20.50 | $31.20 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD - Complex Programmable Logic Device | β |
| Macro Cells | 512 | β |
| Logic Array Blocks (LABs) | 16 | β |
| Maximum User I/O Pins | 172 | β |
| Typical Usable Gates | 12,000 | β |
| Number of Logic Elements | 512 | β |
| Pin-to-Pin Delay (tPD) | 15 ns | β |
| Operating Supply Voltage (VCCINT) | 3.3 V | β |
| I/O Supply Voltage (VCCIO) | 2.5 V / 3.3 V (MultiVolt) | 2.5 V / 3.3 V / 5.0 V |
| Programmable I/O Standards | LVTTL, LVCMOS, PCI (with external resistor) | β |
| In-System Programmability | Yes (IEEE Std. 1532 compliant) | Yes, IEEE Std. 1532 compliant |
| Configuration Memory | EEPROM (non-volatile) | β |
| JTAG Support | Yes (BST/Boundary-Scan Test) | β |
| Package | PQFP-208 (QC208) | 208-pin PQFP (Plastic Quad Flat Pack) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0C to +70C (commercial) | 0 Β°C to +70 Β°C (commercial) |
| RoHS Status | [DATA_NEEDED: RoHS status] | β |
| Macrocells | β | 512 |
| Usable Gates | β | 10,000 |
| User I/Os | β | 172 |
| Logic Elements / LABs | β | 16 Logic Array Blocks |
| Propagation Delay (tPD) | β | 10 ns (-10 speed grade) |
| Maximum Frequency (fCNT) | β | 87 MHz |
| Supply Voltage - Core (VCCINT) | β | 3.3 V |
| Process Technology | β | CMOS EEPROM |
| Boundary-Scan (JTAG) | β | Yes, IEEE 1149.1 |
| PCI-SIG Compliance | β | PCI Local Bus Specification Rev 2.2 (at -10 speed grade) |
| Lead-Free / RoHS | β | [DATA_NEEDED: RoHS status] |