EPM3512AQI208-7N vs EPM3512AQC208-10N Comparison

Detailed side-by-side comparison of EPM3512AQI208-7N by Intel and EPM3512AQC208-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3512AQI208-7N EPM3512AQC208-10N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $18.45 $42.80
Family MAX 3000A MAX 3000A
Product Type CPLD (Complex Programmable Logic Device) β€”
Usable Gates 10,000 Up to 10,000
Macrocells 512 512
Logic Array Blocks (LABs) 16 16
Maximum Operating Frequency 116.3 MHz β€”
Core Supply Voltage (VCCINT) 3.3 V β€”
I/O Supply Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V (MultiVolt) β€”
Package 208-pin PQFP 208-pin PQFP (Plastic Quad Flat Pack)
Programming Interface IEEE 1149.1 JTAG (in-system programmable) β€”
Configuration Memory EEPROM (non-volatile) β€”
Speed Grade 7 (7N suffix) -10
Operating Temperature Industrial (per 'N' suffix) 0 C to 70 C (commercial)
Pin Count 208 β€”
Mounting Type Surface Mount β€”
RoHS Status Compliant [DATA_NEEDED: RoHS status not in verified web data]
User I/O Pins [DATA_NEEDED: exact user I/O count for PQFP-208] β€”
Propagation Delay (tPD) [DATA_NEEDED: tPD in ns per speed grade 7] β€”
Device Type β€” CPLD (Complex Programmable Logic Device)
User I/Os β€” 172
Supply Voltage β€” 3.3 V
Pin-to-Pin Delay β€” 4.5 ns (-10 speed grade)
Maximum Internal Frequency β€” 227.3 MHz
Process Technology β€” CMOS EEPROM
In-System Programming β€” IEEE Std. 1149.1 JTAG, IEEE Std. 1532
Boundary-Scan Test (BST) β€” Built-in, IEEE 1149.1 compliant
I/O Standards β€” MultiVolt (1.8V / 2.5V / 3.3V)

Datasheets & Resources

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