EPM3512ATC144-10 vs EPM3512ATC144-10N Comparison
Detailed side-by-side comparison of EPM3512ATC144-10 by Intel and EPM3512ATC144-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM3512ATC144-10N - MAX 3000A CPLD, 512 Macrocells, 144-TQFP | Intel
EPM3512ATC144-10N β ActiveSpecification Comparison
| Parameter | EPM3512ATC144-10 | EPM3512ATC144-10N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $11.25 | $18.75 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 512 | 512 |
| Logic Array Blocks (LABs) | 16 (32 macrocells each) | 16 |
| Usable Gates | 10,000 | 10000 |
| Maximum User I/O | 212 (212 device-max; 114 in 144-pin TQFP) | 212 |
| Pin-to-Pin Logic Delay (tPD) | 10 ns | β |
| Setup Time (tSU) | 7.0 ns | β |
| Clock-to-Output (tCO) | 6.5 ns | β |
| Maximum Operating Frequency | 116.0 MHz | β |
| Supply Voltage (Core) | 3.3 V | β |
| MultiVolt I/O Voltages | 2.5 V / 3.3 V / 5.0 V | β |
| Programming Interface | JTAG (IEEE Std. 1149.1) ISP | JTAG (IEEE 1149.1), in-system programmable |
| Operating Temperature | -40C to +85C (industrial) | 0C to +70C (commercial, N suffix) |
| Package | TQFP-144 (14x14 mm) | 144-pin TQFP (TC144) |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | Compliant (lead-free) | [DATA_NEEDED: RoHS compliance from datasheet] |
| Propagation Delay (tPD) | β | 10 ns |
| Maximum Frequency (fMAX) | β | [DATA_NEEDED: fMAX in MHz] |
| Core Supply Voltage (VCCINT) | β | 3.3 V |
| I/O Supply Voltage (VCCIO) | β | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5 V (MultiVolt) |
| Configuration Memory | β | Non-volatile EEPROM |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |