EPM5032DC-15 vs EPM5032DM Comparison
Detailed side-by-side comparison of EPM5032DC-15 by Altera and EPM5032DM by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM5032DC-15 - 600-Gate, 32-Macrocell UV PLD | Altera MAX 5000 | DIP-28
EPM5032DC-15 ObsoleteSpecification Comparison
| Parameter | EPM5032DC-15 | EPM5032DM |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 5000 | — |
| Device Type | UV-erasable EPLD (PAL-type CMOS) | — |
| Usable Gates | 600 | 600 to 1000 (typical) |
| Macrocells | 32 | 32 |
| Propagation Delay (tPD) | 15 ns | 25 ns |
| Maximum Toggle Frequency (fMAX) | 83.3 MHz | — |
| Supply Voltage (VCC) | 5 V (nominal) | 5 V (typical) |
| Logic Family | CMOS, TTL-compatible I/O | — |
| Programmable Pins | 16 bidirectional I/O + 4 dedicated input = 20 | — |
| Total Package Pins | 28 | — |
| Package | CERDIP-28 (windowed, through-hole) | CDIP-28 (ceramic windowed DIP, 28-pin) |
| Mounting Type | Through-Hole (DIP) | Through-hole (DIP) |
| Operating Temperature | 0C to +70C (commercial) | -55C to +125C (military/extended, ceramic package) |
| Erasure Method | UV light through ceramic quartz window | — |
| Process Technology | CMOS | CMOS EEPROM |
| RoHS Status | [DATA_NEEDED: RoHS status] | Non-compliant (ceramic DIP with UV window) |
| Lead-Free | unknown | No (ceramic DIP contains lead) |
| Device Family | — | MAX 5000 |
| Logic Inputs | — | 32 |
| Standby Current | — | [DATA_NEEDED: ICC standby current] |
| Programming Technology | — | UV-erasable (windowed) EEPROM |
| Logic Function | — | Combinational and registered (synchronous) |
| Output Polarity | — | Programmable |
| Program Retention | — | Non-volatile (EEPROM) |