EPM5032JC vs EPM5032DI25 Comparison
Detailed side-by-side comparison of EPM5032JC by Altera and EPM5032DI25 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5032JC | EPM5032DI25 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $13.50 | $11.10 |
| Family | MAX 5000 EPLD | MAX 5000 |
| Macrocells | 32 | 32 |
| Logic Gates | 600 usable gates | β |
| Maximum I/O Pins | 40 | β |
| Propagation Delay (tPD) | [DATA_NEEDED: specific speed grade value] | β |
| Supply Voltage (VCC) | 5 V | 5 V (single supply) |
| Input Type | TTL-compatible | β |
| Output Type | TTL/CMOS-compatible | β |
| Package | PLCC-44 | 24-pin Ceramic DIP (DI) with quartz window |
| Operating Temperature | 0C to +70C (commercial) | β |
| Mounting Type | Surface Mount (J-lead) | β |
| Programmability | UV-erasable (windowed ceramic) / OTP variants | β |
| Design Software | MAX+PLUS II / Quartus legacy | β |
| JEDEC Standard | JEDEC PLCC-44 footprint | β |
| RoHS Status | unknown | β |
| Lead-Free | unknown | β |
| Device Type | β | UV-erasable EPLD (CMOS EPROM-based) |
| Logic Array Blocks (LABs) | β | 2 |
| Product Terms | β | 320 |
| Output Macrocells | β | 16 |
| Bidirectional I/O Pins | β | 16 |
| Dedicated Inputs | β | 7 |
| Total Inputs | β | 24 |
| Pin-to-Pin Delay (tPD) | β | 25 ns |
| Maximum Clock Frequency (fMAX) | β | 62.5 MHz |
| I/O Standard | β | TTL-compatible |
| Programming Technology | β | UV-EPROM (erasable via quartz window) |