EPM5032LC-15 vs EPM5032DC-15 Comparison
Detailed side-by-side comparison of EPM5032LC-15 by Altera and EPM5032DC-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM5032DC-15 - 600-Gate, 32-Macrocell UV PLD | Altera MAX 5000 | DIP-28
EPM5032DC-15 ObsoleteSpecification Comparison
| Parameter | EPM5032LC-15 | EPM5032DC-15 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 5000 EPLD | MAX 5000 |
| Architecture | PAL-type AND/OR with PIA | — |
| Usable Gates | 600 | 600 |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 4 | — |
| Dedicated Inputs | 7 | — |
| Bidirectional I/O Pins | 16 | — |
| Maximum Operating Frequency | 83.3 MHz | — |
| Pin-to-Pin Delay (tPD) | 15 ns | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 5 V (nominal) |
| Technology | CMOS EPROM, 1.0 um process | — |
| Programmability | UV-Erasable / OTP | — |
| Package | JLCC-28 (windowed ceramic) | CERDIP-28 (windowed, through-hole) |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| RoHS Status | Non-compliant (contains Pb, ceramic-windowed package) | [DATA_NEEDED: RoHS status] |
| Device Type | — | UV-erasable EPLD (PAL-type CMOS) |
| Propagation Delay (tPD) | — | 15 ns |
| Maximum Toggle Frequency (fMAX) | — | 83.3 MHz |
| Logic Family | — | CMOS, TTL-compatible I/O |
| Programmable Pins | — | 16 bidirectional I/O + 4 dedicated input = 20 |
| Total Package Pins | — | 28 |
| Mounting Type | — | Through-Hole (DIP) |
| Erasure Method | — | UV light through ceramic quartz window |
| Process Technology | — | CMOS |
| Lead-Free | — | unknown |