EPM5032SC-25 vs EPM5032DI-25 Comparison

Detailed side-by-side comparison of EPM5032SC-25 by Intel and EPM5032DI-25 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5032SC-25 EPM5032DI-25
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete NRND
Family MAX 5000 MAX 5000
Device Type EPLD (Erasable/OTP Programmable Logic Device) UV-erasable Programmable Logic Device (PLD)
Macrocells 32 32
Dedicated Inputs 7 7
Bidirectional I/O 16 —
Total Pin Count 28 —
Package PDSO-28 (Plastic DIP Small Outline, SOIC-28 equivalent) Ceramic DIP, windowed (UV-erasable)
Speed Grade -25 —
Propagation Delay (tpd) 25 ns —
Maximum Counter Frequency (fCNT) 91 MHz —
Supply Voltage (VCC) 5 V (typical, 4.5 V to 5.5 V) —
Technology CMOS, UV-erasable or OTP —
Interconnect Programmable Interconnect Array (PIA) —
Operating Temperature (Commercial) 0C to +70C —
Mounting Type Surface Mount —
RoHS Status [DATA_NEEDED: RoHS status - legacy Altera part; verify with distributor] [DATA_NEEDED: likely non-compliant due to ceramic DIP]
Programming Method Altera programming hardware (legacy iMPACT or MAX+PLUS II) —
Architecture — PAL-type, CMOS, AND-OR sum-of-products
Product Terms — 320
Logic Gates — [DATA_NEEDED: equivalent gate count]
Bidirectional I/O Pins — 16
Total Array Inputs — 24
Registered Outputs — 16
Global Clocks — 1
Propagation Delay (tPD) — 25 ns
Maximum Clock Frequency (fMAX) — 62.5 MHz
Supply Voltage — 5 V
Process Technology — CMOS
Pin Count — [DATA_NEEDED: exact pin count - 24 or 28]
Operating Temperature — 0C to +70C (commercial)
I/O Standard — TTL-compatible
Programmability — UV-erasable, EPROM-based
Development Tool — MAX+PLUS II / A+PLUS
Lifecycle — Not Recommended for New Designs (NRND)

Datasheets & Resources

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