EPM5032SC-25 vs EPM5032DI-25 Comparaison
Comparaison détaillée côte à côte de EPM5032SC-25 par Intel et EPM5032DI-25 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5032SC-25 | EPM5032DI-25 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $8,20 | $18,20 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable/OTP Programmable Logic Device) | UV-erasable Programmable Logic Device (PLD) |
| Macrocells | 32 | 32 |
| Dedicated Inputs | 7 | 7 |
| Bidirectional I/O | 16 | — |
| Total Pin Count | 28 | — |
| Boîtier | PDSO-28 (Plastic DIP Small Outline, SOIC-28 equivalent) | Ceramic DIP, windowed (UV-erasable) |
| Speed Grade | -25 | — |
| Propagation Delay (tpd) | 25 ns | — |
| Maximum Counter Frequency (fCNT) | 91 MHz | — |
| Supply Voltage (VCC) | 5 V (typical, 4.5 V to 5.5 V) | — |
| Technology | CMOS, UV-erasable or OTP | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Operating Temperature (Commercial) | 0C to +70C | — |
| Type de montage | Surface Mount | — |
| Statut RoHS | [DATA_NEEDED: RoHS status - legacy Altera part; verify with distributor] | [DATA_NEEDED: likely non-compliant due to ceramic DIP] |
| Programming Method | Altera programming hardware (legacy iMPACT or MAX+PLUS II) | — |
| Architecture | — | PAL-type, CMOS, AND-OR sum-of-products |
| Product Terms | — | 320 |
| Logic Gates | — | [DATA_NEEDED: equivalent gate count] |
| Bidirectional I/O Pins | — | 16 |
| Total Array Inputs | — | 24 |
| Registered Outputs | — | 16 |
| Global Clocks | — | 1 |
| Propagation Delay (tPD) | — | 25 ns |
| Maximum Clock Frequency (fMAX) | — | 62.5 MHz |
| Tension d'alimentation | — | 5 V |
| Process Technology | — | CMOS |
| Nombre de broches | — | [DATA_NEEDED: exact pin count - 24 or 28] |
| Température de fonctionnement | — | 0C to +70C (commercial) |
| I/O Standard | — | TTL-compatible |
| Programmability | — | UV-erasable, EPROM-based |
| Development Tool | — | MAX+PLUS II / A+PLUS |
| Lifecycle | — | Not Recommended for New Designs (NRND) |