EPM5064LC-2 vs EPM5064LC Comparison

Detailed side-by-side comparison of EPM5064LC-2 by Altera and EPM5064LC by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM5064LC-2

EPM5064LC-2 - 64-Macrocell MAX 5000 CPLD, 45ns, PLCC44 | Altera

EPM5064LC-2 Obsolete
Altera
EPM5064LC

EPM5064LC - 64-Macrocell MAX 5000 CPLD, 55ns, 5V | Altera

EPM5064LC Obsolete

Specification Comparison

Parameter EPM5064LC-2 EPM5064LC
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $8.40 $7.10
Device Family MAX 5000 β€”
Product Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 64 β€”
Logic Array Blocks (LABs) 4 4
Logic Elements per LAB 16 β€”
Number of Inputs 36 (7 dedicated + 28 I/O) β€”
Number of I/O Pins 28 β€”
Number of Flip-Flops 28 β€”
Propagation Delay (tPD) 45 ns 55 ns
Maximum Internal Frequency 40 MHz β€”
Process Technology CMOS, OTP EPROM (UV-erasable base) CMOS EPROM
Programmable Polarity Yes β€”
Programmable Output Enable Yes, per macrocell β€”
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) 4.75 V to 5.25 V
Operating Temperature -40 C to +85 C (commercial LC grade) [DATA_NEEDED: explicit min/max in source] 0C to +70C (Commercial)
Package PLCC-44 (J-Lead, plastic) PLCC-44 (LCC-44, J-lead)
Mounting Type Surface Mount Surface Mount
RoHS Status [DATA_NEEDED: not specified in source] [DATA_NEEDED: RoHS status - pre-RoHS legacy part, likely non_compliant]
Programming Method Altera byte-wide / JTAG programmer β€”
Family β€” MAX 5000
Device Type β€” CPLD (Complex Programmable Logic Device)
Programming Type β€” OTP (One-Time-Programmable, UV-erasable EPROM)
Macro Cells β€” 64
Usable Gates β€” 1.25K
Total Inputs β€” 36 (7 dedicated + 29 I/O)
I/O Pins β€” 28 bidirectional + 4 dedicated input
Lead Free β€” [DATA_NEEDED: lead-free status]

Datasheets & Resources

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