EPM5130QC-1 vs EPM5130WC-1 Comparison
Detailed side-by-side comparison of EPM5130QC-1 by Altera and EPM5130WC-1 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM5130WC-1 - 128-Macrocell 40ns UV CPLD, 100-pin CQFP | Intel (Altera) MAX 5000
EPM5130WC-1 ObsoleteSpecification Comparison
| Parameter | EPM5130QC-1 | EPM5130WC-1 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 5000 | — |
| Product Type | UV-Erasable / OTP Complex PLD (CPLD) | — |
| Logic Cells / Macrocells | 128 macrocells | — |
| Usable Gates (marketing) | 5130 gates | — |
| Speed Grade | -1 | — |
| Package | PQFP-100 (windowed ceramic) | — |
| Terminal Pitch | 0.635 mm | — |
| Process Technology | CMOS | CMOS EPROM |
| Configuration Memory | UV-Erasable EPROM | EPROM (on-chip) |
| Supply Voltage | 5 V (single) | [DATA_NEEDED: VCC nominal] |
| Operating Temperature | Commercial (0 C to +70 C) | [DATA_NEEDED: operating temperature range] |
| Programmable Polarity | Yes (per macrocell) | — |
| Boundary Scan / JTAG | Per MAX 5000 family | — |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS compliance] |
| Series | — | MAX 5000 |
| Manufacturer | — | Altera (now Intel) |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocell Count | — | 128 |
| Logic Array Blocks | — | Multiple LABs (per MAX 5000 architecture) |
| Propagation Delay (tpd) | — | 40 ns |
| Maximum Clock Frequency | — | 50 MHz |
| Erasure Method | — | UV (ultraviolet, windowed package) |
| User I/O Pins | — | Up to 100 |
| Package Type | — | 100-pin Ceramic QFP (Windowed) |
| Programmable | — | Yes (UV-erasable, non-volatile) |
| Logic Family | — | MAX 5000 (Altera) |