EPM5192-1LC vs EPM5128LC-1 Comparison
Detailed side-by-side comparison of EPM5192-1LC by Altera and EPM5128LC-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192-1LC | EPM5128LC-1 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $19.40 | $8.20 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Usable Gates | 3,750 | β |
| Macrocells | 192 | β |
| Logic Array Blocks (LABs) | 4 | β |
| User I/O Pins | 64 | β |
| Maximum Operating Frequency | 62.5 MHz | β |
| Propagation Delay (tpd) | [DATA_NEEDED: -1 speed grade tpd in ns] | 30 ns |
| Supply Voltage | 5 V | β |
| Process Technology | UV EPROM, erasable windowless | CMOS EPROM, UV-erasable |
| Programmable Interconnect | PIA (Programmable Interconnect Array) | β |
| JTAG Boundary Scan | IEEE 1149.1 compliant | β |
| Package | 64-pin Ceramic J-Lead Chip Carrier (LC) | β |
| Mounting Type | Surface Mount | Surface Mount (J-lead PLCC socket compatible) |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| RoHS Status | Non-compliant (ceramic windowless package, lead-bearing termination) | [DATA_NEEDED: RoHS status] |
| Logic Elements / Macrocells | β | 128 macrocells |
| Number of Usable Gates | β | [DATA_NEEDED: usable gates] |
| Dedicated Inputs | β | 7 |
| Bidirectional I/O Pins | β | 52 |
| Total User I/O | β | 60 (max) |
| Supply Voltage (VCC) | β | 5 V (Β±10%) |
| Programmability | β | UV-erasable / OTP (windowed package) |
| Package Type | β | 68-pin J-lead ceramic chip carrier (PLCC windowed) |
| JTAG Support | β | IEEE 1149.1 boundary-scan |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |