EPM5192AGC-15 vs EPM5192AGC-20 Comparison
Detailed side-by-side comparison of EPM5192AGC-15 by Altera and EPM5192AGC-20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192AGC-15 | EPM5192AGC-20 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Series | MAX 5000 | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks | 16 (typical for 192-macrocell MAX 5000) | — |
| Maximum User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | — |
| Total Inputs | 72 | — |
| Propagation Delay (tPD) | 15 ns (pin-to-pin, -15 speed grade) | 20 ns |
| Supply Voltage (VCC) | 5 V | 5 V (4.75 V to 5.25 V) |
| Technology | CMOS, UV-erasable EPROM | — |
| Package | Ceramic Pin Grid Array (PGA) | PGA-132 (ceramic windowed, 'GC') |
| Programming Method | UV erase + EPROM program (via Altera programmer) | — |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | 0C to 70C (commercial) |
| RoHS Status | [DATA_NEEDED: RoHS status - legacy ceramic PGA typically non-compliant] | [DATA_NEEDED: RoHS status - ceramic PGA windowed parts are typically pre-RoHS] |
| Lifecycle Status | Obsolete / Last Time Buy (per Altera legacy product list) | — |
| Family | — | MAX 5000 |
| Device Type | — | EPLD (EEPLD, UV-erasable) |
| Usable Gates | — | 12,000 |
| Counter Frequency (fCNT) | — | 100 MHz (max) |
| Logic Array Blocks (LABs) | — | 8 |
| Dedicated I/O Pins | — | 96 |
| Programming Interface | — | IEEE 1149.1 JTAG |
| In-System Programmability | — | Yes (5 V ISP) |
| Security Bit | — | Yes (pattern read-back protected) |
| Mounting Type | — | Through-hole (PGA socket) |