EPM5192AGC-15 vs EPM5192AGC-20 Comparaison
Comparaison détaillée côte à côte de EPM5192AGC-15 par Altera et EPM5192AGC-20 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5192AGC-15 | EPM5192AGC-20 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $27,80 | $9,95 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Series | MAX 5000 | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks | 16 (typical for 192-macrocell MAX 5000) | — |
| Maximum User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | — |
| Total Inputs | 72 | — |
| Propagation Delay (tPD) | 15 ns (pin-to-pin, -15 speed grade) | 20 ns |
| Supply Voltage (VCC) | 5 V | 5 V (4.75 V to 5.25 V) |
| Technology | CMOS, UV-erasable EPROM | — |
| Boîtier | Ceramic Pin Grid Array (PGA) | PGA-132 (ceramic windowed, 'GC') |
| Programming Method | UV erase + EPROM program (via Altera programmer) | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | 0C to 70C (commercial) |
| Statut RoHS | [DATA_NEEDED: RoHS status - legacy ceramic PGA typically non-compliant] | [DATA_NEEDED: RoHS status - ceramic PGA windowed parts are typically pre-RoHS] |
| Statut du cycle de vie | Obsolete / Last Time Buy (per Altera legacy product list) | — |
| Family | — | MAX 5000 |
| Device Type | — | EPLD (EEPLD, UV-erasable) |
| Usable Gates | — | 12,000 |
| Counter Frequency (fCNT) | — | 100 MHz (max) |
| Logic Array Blocks (LABs) | — | 8 |
| Dedicated I/O Pins | — | 96 |
| Programming Interface | — | IEEE 1149.1 JTAG |
| In-System Programmability | — | Yes (5 V ISP) |
| Security Bit | — | Yes (pattern read-back protected) |
| Type de montage | — | Through-hole (PGA socket) |