EPM5192AGC-20 vs EPM5192AGC-15 Comparison
Detailed side-by-side comparison of EPM5192AGC-20 by Intel and EPM5192AGC-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192AGC-20 | EPM5192AGC-15 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 5000 | — |
| Device Type | EPLD (EEPLD, UV-erasable) | — |
| Macrocells | 192 | 192 |
| Usable Gates | 12,000 | — |
| Propagation Delay (tPD) | 20 ns | 15 ns (pin-to-pin, -15 speed grade) |
| Counter Frequency (fCNT) | 100 MHz (max) | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 5 V |
| Logic Array Blocks (LABs) | 8 | — |
| Dedicated I/O Pins | 96 | — |
| Programming Interface | IEEE 1149.1 JTAG | — |
| In-System Programmability | Yes (5 V ISP) | — |
| Security Bit | Yes (pattern read-back protected) | — |
| Package | PGA-132 (ceramic windowed, 'GC') | Ceramic Pin Grid Array (PGA) |
| Mounting Type | Through-hole (PGA socket) | — |
| Operating Temperature | 0C to 70C (commercial) | [DATA_NEEDED: operating temperature range] |
| RoHS Status | [DATA_NEEDED: RoHS status - ceramic PGA windowed parts are typically pre-RoHS] | [DATA_NEEDED: RoHS status - legacy ceramic PGA typically non-compliant] |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Series | — | MAX 5000 |
| Logic Array Blocks | — | 16 (typical for 192-macrocell MAX 5000) |
| Maximum User I/O Pins | — | 64 |
| Dedicated Inputs | — | 7 |
| Total Inputs | — | 72 |
| Technology | — | CMOS, UV-erasable EPROM |
| Programming Method | — | UV erase + EPROM program (via Altera programmer) |
| Lifecycle Status | — | Obsolete / Last Time Buy (per Altera legacy product list) |