EPM5192AGC-20 vs EPM5192AGC-15 比較
詳細な並列比較: EPM5192AGC-20 メーカー: Intel および EPM5192AGC-15 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5192AGC-20 | EPM5192AGC-15 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.95 | $27.80 |
| Family | MAX 5000 | — |
| Device Type | EPLD (EEPLD, UV-erasable) | — |
| Macrocells | 192 | 192 |
| Usable Gates | 12,000 | — |
| Propagation Delay (tPD) | 20 ns | 15 ns (pin-to-pin, -15 speed grade) |
| Counter Frequency (fCNT) | 100 MHz (max) | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 5 V |
| Logic Array Blocks (LABs) | 8 | — |
| Dedicated I/O Pins | 96 | — |
| Programming Interface | IEEE 1149.1 JTAG | — |
| In-System Programmability | Yes (5 V ISP) | — |
| Security Bit | Yes (pattern read-back protected) | — |
| パッケージ | PGA-132 (ceramic windowed, 'GC') | Ceramic Pin Grid Array (PGA) |
| 実装タイプ | Through-hole (PGA socket) | — |
| 動作温度 | 0C to 70C (commercial) | [DATA_NEEDED: operating temperature range] |
| RoHS ステータス | [DATA_NEEDED: RoHS status - ceramic PGA windowed parts are typically pre-RoHS] | [DATA_NEEDED: RoHS status - legacy ceramic PGA typically non-compliant] |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Series | — | MAX 5000 |
| Logic Array Blocks | — | 16 (typical for 192-macrocell MAX 5000) |
| Maximum User I/O Pins | — | 64 |
| Dedicated Inputs | — | 7 |
| Total Inputs | — | 72 |
| Technology | — | CMOS, UV-erasable EPROM |
| Programming Method | — | UV erase + EPROM program (via Altera programmer) |
| ライフサイクル状態 | — | Obsolete / Last Time Buy (per Altera legacy product list) |