EPM5192AJI84-20 vs EPM5192ALI84-15 Comparison
Detailed side-by-side comparison of EPM5192AJI84-20 by Altera and EPM5192ALI84-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192AJI84-20 | EPM5192ALI84-15 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Device Family | MAX 5000 (EPM5192) | MAX 5000 |
| Logic Cells / Macrocells | 192 macrocells | — |
| Device Type | UV-Erasable / OTP Complex PLD | — |
| Propagation Delay (tPD) | 33 ns | 25 ns (-15 speed grade) |
| Maximum Frequency (fCNT) | 66.7 MHz | — |
| Supply Voltage (VCC) | 5 V nominal (4.5 V to 5.5 V) | — |
| Process Technology | CMOS | CMOS, non-volatile EPROM/OTP |
| Operating Temperature Grade | Industrial | Industrial |
| Package Code | WQCCJ (JEDEC) | — |
| Package Type | 84-pin J-bend Ceramic Chip Carrier (PLCC-84, JI) | — |
| Mounting Type | Surface Mount | Surface Mount (PLCC socket compatible) |
| Terminal Form | J-Bend | J Bend (J-Lead) |
| Number of Terminals | 84 | — |
| Programmability | UV-erasable window + OTP | One-Time Programmable (windowless) |
| Pin Count | 84 | — |
| Lifecycle Status | Obsolete (legacy Altera MAX 5000) | — |
| RoHS Status | [DATA_NEEDED: RoHS status of EPM5192AJI84-20] | [DATA_NEEDED: RoHS status] |
| Product Type | — | UV-Erasable / OTP Complex PLD |
| Logic Macrocells | — | 192 |
| Dedicated Inputs | — | 7 |
| Bidirectional I/O Pins | — | 64 |
| Maximum Total Inputs | — | 72 |
| Package | — | 84-pin PQCC (PLCC, J-Lead) |
| JEDEC JESD-30 Code | — | S-PQCC-J84 |
| Operating Temperature Range | — | [DATA_NEEDED: temperature range] |
| Supply Voltage | — | [DATA_NEEDED: VCC range] |