EPM5192AQC-2 vs EPM5192AQC100-20 Comparison

Detailed side-by-side comparison of EPM5192AQC-2 by Altera and EPM5192AQC100-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192AQC-2 EPM5192AQC100-20
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Device Type UV-Erasable / OTP Complex PLD (CPLD) —
Series MAX 5000 (EPM5192) —
Macrocells 192 192
User I/O Pins 64 —
Dedicated Inputs 7 —
Total Inputs 72 —
Propagation Delay (tPD) 45 ns (-2 speed grade) —
Maximum Clock Frequency [DATA_NEEDED: max fMAX for -2 grade] —
Process Technology CMOS CMOS
Switch Matrix UV-Erasable / OTP (windowless on AQC package) —
Package 100-pin PQFP (R-PQFP-G100) 100-lead PQFP (R-PQFP-G100)
Lead Pitch 0.635 mm —
Terminal Form Gull-wing —
Operating Temperature [DATA_NEEDED: commercial / industrial / military grade] —
Mounting Type Surface Mount Surface Mount (PQFP)
Programming Interface JTAG (IEEE 1149.1) boundary scan —
RoHS Status [DATA_NEEDED: confirmed compliance status] [DATA_NEEDED: RoHS status]
Device Family — MAX 5000
Product Type — Complex Programmable Logic Device (CPLD)
Maximum Operating Frequency — 66.7 MHz
Propagation Delay (tpd) — 33 ns
Terminal Pitch — 0.65 mm
Programming Technology — UV-Erasable / One-Time-Programmable (OTP)
Supply Voltage — 5 V (typical, MAX 5000 family)
Operating Temperature Range — [DATA_NEEDED: operating temperature range]
I/O Count — [DATA_NEEDED: usable I/O count]
Logic Array Blocks — Multiple LABs (per MAX 5000 architecture)
Lead-Free — [DATA_NEEDED: lead-free status]
MSL Level — [DATA_NEEDED: MSL rating]

Datasheets & Resources

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