EPM5192AQC-2 vs EPM5192AQC100-20 比較

詳細並排比較 EPM5192AQC-2 由 Altera 與 EPM5192AQC100-20 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPM5192AQC-2 EPM5192AQC100-20
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Device Type UV-Erasable / OTP Complex PLD (CPLD) —
Series MAX 5000 (EPM5192) —
Macrocells 192 192
User I/O Pins 64 —
Dedicated Inputs 7 —
Total Inputs 72 —
Propagation Delay (tPD) 45 ns (-2 speed grade) —
最大時脈頻率 [DATA_NEEDED: max fMAX for -2 grade] —
Process Technology CMOS CMOS
Switch Matrix UV-Erasable / OTP (windowless on AQC package) —
封裝 100-pin PQFP (R-PQFP-G100) 100-lead PQFP (R-PQFP-G100)
Lead Pitch 0.635 mm —
Terminal Form Gull-wing —
工作溫度 [DATA_NEEDED: commercial / industrial / military grade] —
安裝類型 Surface Mount Surface Mount (PQFP)
Programming Interface JTAG (IEEE 1149.1) boundary scan —
RoHS 狀態 [DATA_NEEDED: confirmed compliance status] [DATA_NEEDED: RoHS status]
Device Family — MAX 5000
Product Type — Complex Programmable Logic Device (CPLD)
Maximum Operating Frequency — 66.7 MHz
Propagation Delay (tpd) — 33 ns
Terminal Pitch — 0.65 mm
Programming Technology — UV-Erasable / One-Time-Programmable (OTP)
供應電壓 — 5 V (typical, MAX 5000 family)
工作溫度範圍 — [DATA_NEEDED: operating temperature range]
I/O Count — [DATA_NEEDED: usable I/O count]
Logic Array Blocks — Multiple LABs (per MAX 5000 architecture)
Lead-Free — [DATA_NEEDED: lead-free status]
MSL 等級 — [DATA_NEEDED: MSL rating]

資料表與資源

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