EPM5192C-2 vs EPM5192LC-2 Comparison
Detailed side-by-side comparison of EPM5192C-2 by Altera and EPM5192LC-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192C-2 | EPM5192LC-2 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $13.20 | $7.95 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | Complex Programmable Logic Device (CPLD) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 192 | 192 |
| User I/O Pins | 64 | 64 |
| Logic Array Blocks (LABs) | 12 | 12 |
| Dedicated Inputs | 7 | β |
| External Clock Inputs | 1 | 1 |
| Propagation Delay (PIA, typical) | 45 ns | β |
| Maximum Operating Frequency | 50 MHz | β |
| Process Technology | CMOS | CMOS |
| Configuration Memory | EEPROM (non-volatile) | β |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | β |
| Speed Grade | -2 | β |
| Programming Interface | JTAG / Altera MAX+ programming | β |
| RoHS Status | unknown | [DATA_NEEDED: pre-RoHS legacy part β likely non-RoHS] |
| Lead-Free | unknown | β |
| Dedicated Input Pins | β | 7 |
| Propagation Delay (tPD) | β | 45 ns (typical, -2 speed grade) |
| Maximum Internal Frequency | β | 50 MHz |
| Interconnect | β | Programmable Interconnect Array (PIA) |
| Package | β | PQCC-84 (PLCC-84, J-lead, surface mount) |
| Programming | β | Non-volatile (EPROM/EEPROM-based, in-system programmable via JTAG) |
| Operating Temperature | β | [DATA_NEEDED: commercial/industrial/military grade] |
| Supply Voltage | β | 5 V (typical MAX 5000 family) |