EPM5192GI vs EPM5192JC-ES Comparison
Detailed side-by-side comparison of EPM5192GI by Altera and EPM5192JC-ES by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192GI | EPM5192JC-ES |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $18.95 | $16.45 |
| Family | MAX 5000 | β |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (EPLD) |
| Technology | CMOS EPROM (UV-erasable / OTP) | CMOS |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 16 (12 macrocells per LAB) | 12 |
| User I/O Pins | 64 | [DATA_NEEDED: user I/O count for JC-ES in PLCC-84] |
| Dedicated Inputs | 7 | β |
| Total Inputs | 72 | β |
| Propagation Delay (tPD) | 55 ns | β |
| Maximum Internal Frequency (fCNT) | 33.3 MHz | β |
| Supply Voltage (VCC) | 4.5 V to 5.5 V (nominal 5 V) | β |
| Operating Temperature | -40 C to +85 C (Industrial) | [DATA_NEEDED: operating temperature range for ES grade] |
| Package Type | 84-pin PGA (Pin Grid Array), ceramic with quartz window | β |
| Programmable | UV-erasable (windowed) and OTP variants | β |
| Mounting Type | Through-hole (PGA) | Surface Mount |
| RoHS Status | [DATA_NEEDED: not confirmed in verified web data] | [DATA_NEEDED: RoHS compliance] |
| Device Family | β | MAX 5000 |
| Interconnect | β | Programmable Interconnect Array (PIA) |
| Configuration Memory | β | EPROM (UV-erasable, one-time programmable for JC-ES) |
| Package | β | 84-pin PLCC (J-lead, CQCC, JEDEC S-CQCC-J84) |
| Programming | β | Altera MAX+PLUS II or compatible programmer |
| Supply Voltage | β | [DATA_NEEDED: VCC nominal] |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |
| MSL Level | β | [DATA_NEEDED: MSL rating] |
| Note | β | Datasheet source: Altera MAX 5000 family document, 52 pages |