EPM5192GM883B-2 vs EPM5192GM883B Comparison
Detailed side-by-side comparison of EPM5192GM883B-2 by Altera and EPM5192GM883B by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192GM883B-2 | EPM5192GM883B |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device), UV-erasable | EPLD (UV-erasable) |
| Macrocells | 192 | 192 |
| Propagation Delay (tPD) | 45 ns (-2 speed grade) | — |
| Maximum Internal Clock Frequency | 33.3 MHz | — |
| Supply Voltage (VCC, nominal) | 5 V | — |
| Technology | 5 V CMOS | — |
| Dedicated Inputs | 7 | 7 |
| User I/O Pins | 64 | 64 |
| Package | 84-pin Ceramic Pin Grid Array (CPGA), code S-CPGA-P84 | 84-terminal CPGA (Ceramic Pin Grid Array) |
| Package Outline | 28.45 mm square (approx.) | — |
| Military Screening | MIL-STD-883 (per '883' suffix) | MIL-STD-883 Revision B |
| Mounting Type | Through-hole PGA socket | Through-Hole (PGA) |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | — |
| RoHS Status | non_compliant (ceramic CPGA with MIL-STD-883 screening) | [DATA_NEEDED: RoHS compliance] |
| JEDEC Package Code | S-CPGA-P84 | — |
| Nominal Supply Voltage (VCC) | — | 5 V |
| Maximum Clock Frequency | — | 33.3 MHz |
| Propagation Delay (tpd) | — | 55 ns |
| Package Body Size | — | 28.45 mm square |
| Process Technology | — | CMOS |
| Programming Technology | — | UV-EPROM (non-volatile) |