EPM5192JC84-1 vs EPM5192LC84-1 Comparison
Detailed side-by-side comparison of EPM5192JC84-1 by Altera and EPM5192LC84-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192JC84-1 | EPM5192LC84-1 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Device Type | UV-Erasable/OTP Complex Programmable Logic Device (CPLD) | EPLD (UV-Erasable / OTP Complex PLD) |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 192 | 192 |
| Propagation Delay (tpd) | 40 ns (worst case) | — |
| Supply Voltage (Vcc) | 4.75 V to 5.25 V (5 V ±5 %) | — |
| Process Technology | CMOS EPROM | CMOS EPROM |
| Operating Temperature Grade | Commercial | — |
| Package | 84-terminal Ceramic Chip Carrier (CQCC84 / J-lead) | 84-pin PLCC (LC84) |
| JESD-30 Package Code | S-CQCC-J84 | — |
| Terminal Form | J-BEND | — |
| Package Shape | SQUARE | — |
| Mounting Type | Surface Mount | Surface Mount (J-lead) |
| Programmability | UV-erasable (window) / OTP in production | — |
| Configuration Memory | EPROM (non-volatile, instant-on) | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: not stated in provided data] |
| Logic Array Blocks (LABs) | — | 16 |
| Usable Gates | — | 7,500 |
| Speed Grade | — | -1 |
| Propagation Delay (tPD) | — | [DATA_NEEDED: tPD ns value] |
| Supply Voltage (VCC) | — | 5 V |
| Program Memory Type | — | UV-EPROM / OTP |
| Operating Temperature | — | 0C to +70C (commercial) |
| I/O Count | — | [DATA_NEEDED: I/O pin count] |