EPM5192JC84-1 vs EPM5192LC84-1 比較
詳細並排比較 EPM5192JC84-1 由 Altera 與 EPM5192LC84-1 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5192JC84-1 | EPM5192LC84-1 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Type | UV-Erasable/OTP Complex Programmable Logic Device (CPLD) | EPLD (UV-Erasable / OTP Complex PLD) |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 192 | 192 |
| Propagation Delay (tpd) | 40 ns (worst case) | — |
| Supply Voltage (Vcc) | 4.75 V to 5.25 V (5 V ±5 %) | — |
| Process Technology | CMOS EPROM | CMOS EPROM |
| Operating Temperature Grade | Commercial | — |
| 封裝 | 84-terminal Ceramic Chip Carrier (CQCC84 / J-lead) | 84-pin PLCC (LC84) |
| JESD-30 Package Code | S-CQCC-J84 | — |
| Terminal Form | J-BEND | — |
| Package Shape | SQUARE | — |
| 安裝類型 | Surface Mount | Surface Mount (J-lead) |
| Programmability | UV-erasable (window) / OTP in production | — |
| Configuration Memory | EPROM (non-volatile, instant-on) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: not stated in provided data] |
| Logic Array Blocks (LABs) | — | 16 |
| Usable Gates | — | 7,500 |
| Speed Grade | — | -1 |
| Propagation Delay (tPD) | — | [DATA_NEEDED: tPD ns value] |
| Supply Voltage (VCC) | — | 5 V |
| Program Memory Type | — | UV-EPROM / OTP |
| 工作溫度 | — | 0C to +70C (commercial) |
| I/O Count | — | [DATA_NEEDED: I/O pin count] |