EPM5192LC-2 vs EPM5192LC-M091A Comparison
Detailed side-by-side comparison of EPM5192LC-2 by Altera and EPM5192LC-M091A by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192LC-2 | EPM5192LC-M091A |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 5000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | 12 |
| User I/O Pins | 64 | 64 |
| Dedicated Input Pins | 7 | — |
| External Clock Inputs | 1 | — |
| Propagation Delay (tPD) | 45 ns (typical, -2 speed grade) | — |
| Maximum Internal Frequency | 50 MHz | — |
| Interconnect | Programmable Interconnect Array (PIA) | Programmable Interconnect Array (PIA) |
| Process Technology | CMOS | — |
| Package | PQCC-84 (PLCC-84, J-lead, surface mount) | LC (custom pin-grid / customer-specific, M091A designation) |
| Programming | Non-volatile (EPROM/EEPROM-based, in-system programmable via JTAG) | — |
| Operating Temperature | [DATA_NEEDED: commercial/industrial/military grade] | [DATA_NEEDED: operating temperature grade] |
| Supply Voltage | 5 V (typical MAX 5000 family) | — |
| RoHS Status | [DATA_NEEDED: pre-RoHS legacy part — likely non-RoHS] | [DATA_NEEDED: RoHS status for EPM5192LC-M091A] |
| Device Family | — | MAX 5000 EPLD |
| Dedicated Inputs | — | 7 |
| Global Clock Inputs | — | 1 |
| Propagation Delay (tpd) | — | 55 ns (typical, MAX 5000 family) |
| Supply Voltage (Vcc) | — | 5 V |
| Technology | — | UV-erasable CMOS, EPROM-based |
| Pin Count | — | [DATA_NEEDED: pin count of LC-M091A package] |
| Configuration Memory | — | Non-volatile EPROM (UV-erasable) |
| Development Tool | — | Altera MAX+PLUS II (legacy) |