EPM5192LC-2 vs EPM5192LC-M091A Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192LC-2 sa pamamagitan ng Altera at EPM5192LC-M091A sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM5192LC-2 EPM5192LC-M091A
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family MAX 5000 —
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 192 192
Logic Array Blocks (LABs) 12 12
User I/O Pins 64 64
Dedicated Input Pins 7 —
External Clock Inputs 1 —
Propagation Delay (tPD) 45 ns (typical, -2 speed grade) —
Maximum Internal Frequency 50 MHz —
Interconnect Programmable Interconnect Array (PIA) Programmable Interconnect Array (PIA)
Process Technology CMOS —
Packhaging PQCC-84 (PLCC-84, J-lead, surface mount) LC (custom pin-grid / customer-specific, M091A designation)
Programming Non-volatile (EPROM/EEPROM-based, in-system programmable via JTAG) —
Temperature na Operasyon [DATA_NEEDED: commercial/industrial/military grade] [DATA_NEEDED: operating temperature grade]
Volte ng Pagbibigay 5 V (typical MAX 5000 family) —
Tindminan RoHS [DATA_NEEDED: pre-RoHS legacy part — likely non-RoHS] [DATA_NEEDED: RoHS status for EPM5192LC-M091A]
Device Family — MAX 5000 EPLD
Dedicated Inputs — 7
Global Clock Inputs — 1
Propagation Delay (tpd) — 55 ns (typical, MAX 5000 family)
Supply Voltage (Vcc) — 5 V
Technology — UV-erasable CMOS, EPROM-based
Bilang ng Pin — [DATA_NEEDED: pin count of LC-M091A package]
Configuration Memory — Non-volatile EPROM (UV-erasable)
Development Tool — Altera MAX+PLUS II (legacy)

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