EPM5192LC-45 vs EPM5192LC-1 Comparison
Detailed side-by-side comparison of EPM5192LC-45 by Altera and EPM5192LC-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192LC-45 | EPM5192LC-1 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Series | EPM5192 | — |
| Macrocells | 192 | 192 |
| Logic Elements | 192 macrocells | — |
| Maximum Operating Frequency | 100 MHz | — |
| Pin-to-Pin Delay (tPD) | 45 ns | — |
| Dedicated Inputs | [DATA_NEEDED: dedicated input count] | 7 |
| Programmable I/O Pins | [DATA_NEEDED: I/O pin count] | — |
| Configuration Memory | UV-erasable EPROM / OTP | — |
| Technology | EPROM-based CMOS | CMOS, UV-erasable / OTP EPROM cell |
| Package Type | LCC (Leaded Ceramic Chip Carrier) with UV window | LDCC (Leaded Ceramic Chip Carrier), plastic windowless |
| Package Code | LC | — |
| Speed Grade | -45 (45 ns tPD) | -1 |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Supply Voltage | 5 V | 5 V nominal (4.75 V to 5.25 V) |
| RoHS Status | [DATA_NEEDED: RoHS status] | Non-compliant (ceramic LDCC with Pb-bearing terminations) |
| Mounting Type | Surface Mount (LCC) | — |
| Datasheet Page Count | 52 pages | — |
| Device Type | — | EPLD / CPLD |
| Logic Gates | — | 3750 (typical usable) |
| User I/O | — | 64 |
| Number of Pins | — | 84 |
| Propagation Delay | — | 25 ns |
| Maximum Clock Frequency | — | 50 MHz |
| Programmable Memory | — | EPROM (one-time or UV-erasable) |