EPM5192LC-45 vs EPM5192LC-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192LC-45 sa pamamagitan ng Altera at EPM5192LC-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192LC-45 | EPM5192LC-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Series | EPM5192 | — |
| Macrocells | 192 | 192 |
| Logic Elements | 192 macrocells | — |
| Maximum Operating Frequency | 100 MHz | — |
| Pin-to-Pin Delay (tPD) | 45 ns | — |
| Dedicated Inputs | [DATA_NEEDED: dedicated input count] | 7 |
| Programmable I/O Pins | [DATA_NEEDED: I/O pin count] | — |
| Configuration Memory | UV-erasable EPROM / OTP | — |
| Technology | EPROM-based CMOS | CMOS, UV-erasable / OTP EPROM cell |
| Package Type | LCC (Leaded Ceramic Chip Carrier) with UV window | LDCC (Leaded Ceramic Chip Carrier), plastic windowless |
| Package Code | LC | — |
| Speed Grade | -45 (45 ns tPD) | -1 |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Volte ng Pagbibigay | 5 V | 5 V nominal (4.75 V to 5.25 V) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Non-compliant (ceramic LDCC with Pb-bearing terminations) |
| Uri ng Pagpapasok | Surface Mount (LCC) | — |
| Datasheet Page Count | 52 pages | — |
| Device Type | — | EPLD / CPLD |
| Logic Gates | — | 3750 (typical usable) |
| User I/O | — | 64 |
| Bilang ng Pins | — | 84 |
| Propagation Delay | — | 25 ns |
| Maksimum na Taktiko ng Oras | — | 50 MHz |
| Programmable Memory | — | EPROM (one-time or UV-erasable) |