EPM5192LC-M091A vs EPM5192LC Comparison

Detailed side-by-side comparison of EPM5192LC-M091A by Altera and EPM5192LC by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192LC-M091A EPM5192LC
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $62.00 $28.40
Device Family MAX 5000 EPLD β€”
Macrocells 192 192
User I/O Pins 64 64
Dedicated Inputs 7 7
Logic Array Blocks (LABs) 12 12
Global Clock Inputs 1 1
Propagation Delay (tpd) 55 ns (typical, MAX 5000 family) β€”
Supply Voltage (Vcc) 5 V β€”
Technology UV-erasable CMOS, EPROM-based β€”
Interconnect Programmable Interconnect Array (PIA) β€”
Package LC (custom pin-grid / customer-specific, M091A designation) JLCC-68 (windowed ceramic, LC suffix)
Pin Count [DATA_NEEDED: pin count of LC-M091A package] β€”
Operating Temperature [DATA_NEEDED: operating temperature grade] β€”
Configuration Memory Non-volatile EPROM (UV-erasable) β€”
Development Tool Altera MAX+PLUS II (legacy) β€”
RoHS Status [DATA_NEEDED: RoHS status for EPM5192LC-M091A] [DATA_NEEDED: RoHS status]
Family β€” MAX 7000S
Propagation Delay (tPD) β€” 55 ns (typical, commercial)
Maximum Clock Frequency (fMAX) β€” 50 MHz
Supply Voltage (VCC) β€” 4.75 V to 5.25 V (nominal 5 V)
Process Technology β€” CMOS, UV-erasable/OTP EPROM configuration
Programmable Interconnect β€” Programmable Interconnect Array (PIA), fixed delay
Boundary-Scan Support β€” JTAG IEEE 1149.1
Programming Interface β€” JTAG (ByteBlaster-compatible)
Operating Temperature (commercial) β€” 0C to +70C
Mounting Type β€” Surface Mount

Datasheets & Resources

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