EPM5192LC-M091A vs EPM5192LC-2 Comparison

Detailed side-by-side comparison of EPM5192LC-M091A by Altera and EPM5192LC-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192LC-M091A EPM5192LC-2
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Device Family MAX 5000 EPLD —
Macrocells 192 192
User I/O Pins 64 64
Dedicated Inputs 7 —
Logic Array Blocks (LABs) 12 12
Global Clock Inputs 1 —
Propagation Delay (tpd) 55 ns (typical, MAX 5000 family) —
Supply Voltage (Vcc) 5 V —
Technology UV-erasable CMOS, EPROM-based —
Interconnect Programmable Interconnect Array (PIA) Programmable Interconnect Array (PIA)
Package LC (custom pin-grid / customer-specific, M091A designation) PQCC-84 (PLCC-84, J-lead, surface mount)
Pin Count [DATA_NEEDED: pin count of LC-M091A package] —
Operating Temperature [DATA_NEEDED: operating temperature grade] [DATA_NEEDED: commercial/industrial/military grade]
Configuration Memory Non-volatile EPROM (UV-erasable) —
Development Tool Altera MAX+PLUS II (legacy) —
RoHS Status [DATA_NEEDED: RoHS status for EPM5192LC-M091A] [DATA_NEEDED: pre-RoHS legacy part — likely non-RoHS]
Family — MAX 5000
Device Type — CPLD (Complex Programmable Logic Device)
Dedicated Input Pins — 7
External Clock Inputs — 1
Propagation Delay (tPD) — 45 ns (typical, -2 speed grade)
Maximum Internal Frequency — 50 MHz
Process Technology — CMOS
Programming — Non-volatile (EPROM/EEPROM-based, in-system programmable via JTAG)
Supply Voltage — 5 V (typical MAX 5000 family)

Datasheets & Resources

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