EPM5192LC-M091A vs EPM5192LC-2 比較

詳細並排比較 EPM5192LC-M091A 由 Altera 與 EPM5192LC-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPM5192LC-M091A EPM5192LC-2
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Device Family MAX 5000 EPLD —
Macrocells 192 192
User I/O Pins 64 64
Dedicated Inputs 7 —
Logic Array Blocks (LABs) 12 12
Global Clock Inputs 1 —
Propagation Delay (tpd) 55 ns (typical, MAX 5000 family) —
Supply Voltage (Vcc) 5 V —
Technology UV-erasable CMOS, EPROM-based —
Interconnect Programmable Interconnect Array (PIA) Programmable Interconnect Array (PIA)
封裝 LC (custom pin-grid / customer-specific, M091A designation) PQCC-84 (PLCC-84, J-lead, surface mount)
腳位數 [DATA_NEEDED: pin count of LC-M091A package] —
工作溫度 [DATA_NEEDED: operating temperature grade] [DATA_NEEDED: commercial/industrial/military grade]
Configuration Memory Non-volatile EPROM (UV-erasable) —
Development Tool Altera MAX+PLUS II (legacy) —
RoHS 狀態 [DATA_NEEDED: RoHS status for EPM5192LC-M091A] [DATA_NEEDED: pre-RoHS legacy part — likely non-RoHS]
Family — MAX 5000
Device Type — CPLD (Complex Programmable Logic Device)
Dedicated Input Pins — 7
External Clock Inputs — 1
Propagation Delay (tPD) — 45 ns (typical, -2 speed grade)
Maximum Internal Frequency — 50 MHz
Process Technology — CMOS
Programming — Non-volatile (EPROM/EEPROM-based, in-system programmable via JTAG)
供應電壓 — 5 V (typical MAX 5000 family)

資料表與資源

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