EPM5192LC1 vs EPM5192JC Comparison
Detailed side-by-side comparison of EPM5192LC1 by Altera and EPM5192JC by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192LC1 | EPM5192JC |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $17.40 | $16.40 |
| Family | MAX 5000 | β |
| Device Type | Complex PLD (CPLD), UV-erasable/OTP | β |
| Macrocells | 192 | 192 |
| Equivalent Gates | 3750 | β |
| Dedicated Inputs | 7 | β |
| User I/O Pins | 64 | β |
| Package | PQCC-84 (JEDEC S-PQCC-J84, 84-lead Plastic Leaded Chip Carrier) | 68-pin PLCC (JC) windowed ceramic |
| Nominal Supply Voltage (VCC) | 5 V | β |
| Supply Voltage Range | 4.75 V to 5.25 V | β |
| Maximum Clock Frequency | 50 MHz | β |
| Propagation Delay (tPD) | 40 ns | β |
| Process Technology | CMOS EPROM | CMOS EPROM (UV-erasable) |
| Programming Method | OTP (LC plastic package); UV-erasable equivalents in JC ceramic package | UV-erase + EPROM programmer |
| Operating Temperature (Commercial 'LC') | 0 Β°C to 70 Β°C | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: original Altera marking not RoHS] |
| JEDEC Package Code | S-PQCC-J84 | β |
| Product Type | β | CPLD (Complex Programmable Logic Device) |
| Series | β | EPM5192 (Classic / MAX-class) |
| Logic Array Blocks (LABs) | β | 12 |
| Interconnect Architecture | β | Programmable Interconnect Array (PIA) |
| Non-Volatile Configuration | β | Yes (EPROM cell array) |
| Logic Family | β | Classic CPLD (EPM5xxx series) |
| Operating Temperature | β | [DATA_NEEDED: commercial / industrial / military grade] |
| Supply Voltage | β | [DATA_NEEDED: VCC nominal] |
| Propagation Delay | β | [DATA_NEEDED: tpd spec by speed grade] |