EPM5192LC84 vs EPM5192LI-2 Comparison
Detailed side-by-side comparison of EPM5192LC84 by Altera and EPM5192LI-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192LC84 | EPM5192LI-2 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Product Type | Complex Programmable Logic Device (CPLD) | — |
| Family | MAX 5000 | MAX 5000 |
| Macrocells (Logic Cells) | 192 | — |
| Propagation Delay (tPD) | 55 ns | — |
| Process Technology | CMOS | — |
| Programmability | OTP / UV-Erasable | — |
| Package | LCC-84 (PQCC84, MS-018) | 84-pin PLCC (J-lead), JEDEC S-PQCC-J84 |
| Pin Count | 84 | — |
| Mounting Type | Surface Mount (Socket-compatible) | Surface Mount |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | -40 C to +85 C (industrial) |
| Supply Voltage | [DATA_NEEDED: VCC range] | 4.5 V to 5.5 V |
| User I/O | [DATA_NEEDED: max user I/O count] | 64 |
| Configuration Memory | EPROM / UV-Erasable | — |
| Programming Interface | JTAG / Altera legacy (MAX+PLUS II baseline) | — |
| RoHS Status | unknown | [DATA_NEEDED: RoHS status] |
| MSL Level | [DATA_NEEDED: MSL rating] | — |
| Device Type | — | EPLD (Erasable/OTP Complex PLD) |
| Macrocells | — | 192 |
| Logic Array Blocks (LABs) | — | 12 |
| Total Inputs | — | 72 (7 dedicated + 64 I/O) |
| Propagation Delay (tpd) | — | 55 ns (max) |
| Maximum Internal Frequency | — | 100 MHz |
| Typical Power Dissipation | — | 600 mW at 5 V / 25 C |
| Technology | — | CMOS, UV-erasable / OTP |
| Design Toolchain | — | Altera MAX+plus II |