EPM570F100I5N vs EPM570GT100I5 Comparison
Detailed side-by-side comparison of EPM570F100I5N by Altera and EPM570GT100I5 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM570F100I5N
EPM570F100I5N - 570 LEs CPLD, 100-FBGA, 5.4ns | Intel / Altera
EPM570F100I5N β ActiveAltera
EPM570GT100I5
EPM570GT100I5 - 570 LE MAX II CPLD, 100-TQFP | Intel / Altera
EPM570GT100I5 β ActiveSpecification Comparison
| Parameter | EPM570F100I5N | EPM570GT100I5 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $13.40 | $4.95 |
| Family | MAX II | β |
| Device Type | CPLD (Flash-based) | β |
| Logic Elements (LEs) | 570 | β |
| Macrocells | 440 | 440 |
| Maximum User I/Os | 76 | β |
| User Flash Memory | 8 Kbits | 8 Kbits |
| Maximum Operating Frequency | 304 MHz | β |
| Propagation Delay (tPD) | 8.7 ns (max), 5.4 ns (typical) | 5.4 ns (typ) |
| Supply Voltage (VCCINT) | 2.375 V to 3.6 V | β |
| Typical Supply Current (ICC) | 55 mA | β |
| I/O Standards Supported | LVCMOS, LVTTL, LVDS, SSTL, HSTL (1.5/1.8/2.5/3.3 V) | β |
| Programming Interface | JTAG (IEEE 1149.1), in-system programmable | β |
| Global Clocks | 4 | β |
| Operating Temperature | -40C to +100C (Industrial) | -40 C to +100 C (Industrial, "I5") |
| Package | 100-ball FineLine BGA (11x11 mm) | 100-pin TQFP (14x14 mm, 0.5 mm pitch) |
| Mounting Type | Surface Mount | Surface Mount (Gull-wing leads) |
| Process Technology | CMOS, Flash configuration cell | β |
| Hot Socketing | Supported | β |
| RoHS Status | Compliant | Compliant |
| Series | β | MAX II |
| Logic Elements (LE) | β | 570 |
| Maximum User I/O Pins | β | 76 |
| Internal Supply Voltage (VCCINT) | β | 1.71 V to 1.89 V |
| User I/O Voltage (VCCIO) | β | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Programmability | β | In-System Programmable (ISP) via JTAG, non-volatile flash |
| Configuration Time | β | Instant-On (< 1 ms, no external PROM required) |
| Typical Active Current | β | [DATA_NEEDED: typical active ICC] |
| Speed Grade | β | GT (fast) |
| JTAG Support | β | IEEE 1149.1 boundary scan |
| Global Clock Networks | β | 4 |