EPM7096LC84-7 vs EPM7096LI68-15 Comparison
Detailed side-by-side comparison of EPM7096LC84-7 by Intel and EPM7096LI68-15 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7096LC84-7 | EPM7096LI68-15 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last Time Buy |
| Family | MAX 7000 | MAX 7000 (second-generation MAX architecture) |
| Macrocells | 96 | 96 |
| Logic Array Blocks (LABs) | 4 | 4 |
| User I/O Pins | 64 | 52 |
| Speed Grade (tPD) | 7.5 ns | — |
| Package | 84-pin PLCC (Plastic Leaded Chip Carrier) | 68-pin PLCC (J-lead, QCCJ) |
| Mounting Type | Surface Mount | Surface Mount (J-lead) |
| Supply Voltage | 5.0 V | — |
| Programming Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Architecture | Second-generation MAX | — |
| I/O Logic Levels | 5.0 V TTL/CMOS-compatible | — |
| Operating Temperature | 0C to +70C (commercial, LC suffix) | — |
| RoHS Status | Non-compliant (original Altera product, leaded PLCC package) | [DATA_NEEDED: RoHS status] |
| Lifecycle Status | Obsolete - PCN/PDN issued by Intel | — |
| Propagation Delay (tPD) | — | 15 ns |
| Supply Voltage (VCCINT) | — | 5.0 V |
| Programmable Logic Type | — | EEPROM-based, in-system programmable (ISP) |
| Programming Interface | — | IEEE Std. 1149.1 JTAG |
| Boundary-Scan Test (BST) | — | Built-in JTAG BST circuitry |
| Output Option | — | Open-drain output option available |
| Operating Temperature Grade | — | Industrial (-40C to +85C) |
| Speed Grade | — | -15 (15 ns tPD) |
| Process Technology | — | CMOS EEPROM |