EPM7128AETC100-10 vs EPM7128ATI100-10 Comparison
Detailed side-by-side comparison of EPM7128AETC100-10 by Intel and EPM7128ATI100-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128ATI100-10 - 128-Macrocell 10ns 3.3V CPLD | Altera MAX 7000A
EPM7128ATI100-10 ⚠ Last Time BuySpecification Comparison
| Parameter | EPM7128AETC100-10 | EPM7128ATI100-10 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last Time Buy |
| Family | MAX 7000A | MAX 7000A (MAX II of MAX 7000 series) |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 128 | — |
| User I/Os | 84 | — |
| Usable Gates | 2.5K | 2,500 |
| Logic Array Blocks (LABs) | 8 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Supply Voltage (Core) | 3.3 V | — |
| I/O Tolerance | 5.0 V tolerant | — |
| Program Technology | EEPROM (in-system programmable) | — |
| Package | 100-pin TQFP (ET) | 100-pin TQFP (14x14 mm) |
| Operating Temperature | -40C to +85C (commercial/industrial) | -40C to +85C (Industrial, 'I' suffix) |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| RoHS Status | Compliant | Non-compliant (legacy part) |
| Lifecycle Status | Obsolete (migrate to MAX II or MAX V) | — |
| Series | — | MAX 7000A |
| Programmable Type | — | EE PLD (EEPROM-based, in-system programmable) |
| Number of Macrocells | — | 128 |
| Number of Logic Array Blocks (LABs) | — | 4 |
| Number of I/O Pins | — | 68 |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Frequency (fMAX) | — | 87 MHz |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V (3.3 V typical) |
| I/O Standard | — | MultiVolt (2.5V / 3.3V / 5.0V tolerant) |
| Programming Interface | — | IEEE Std. 1149.1 JTAG (ISP) |
| Process Technology | — | CMOS EEPROM |
| Mounting Type | — | Surface Mount |