EPM7128AETC100-10 vs EPM7128EQC100-10 Comparison
Detailed side-by-side comparison of EPM7128AETC100-10 by Intel and EPM7128EQC100-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7128AETC100-10 | EPM7128EQC100-10 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 7000A | MAX 7000 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | 128 |
| User I/Os | 84 | — |
| Usable Gates | 2.5K | 2,500 |
| Logic Array Blocks (LABs) | 8 | 4 |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Supply Voltage (Core) | 3.3 V | — |
| I/O Tolerance | 5.0 V tolerant | — |
| Program Technology | EEPROM (in-system programmable) | — |
| Package | 100-pin TQFP (ET) | 100-pin PQFP (Plastic Quad Flat Pack), gull-wing leads |
| Operating Temperature | -40C to +85C (commercial/industrial) | 0 °C to +90 °C (Commercial) |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| RoHS Status | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Lifecycle Status | Obsolete (migrate to MAX II or MAX V) | — |
| Logic Family | — | CPLD - Complex Programmable Logic Device |
| User I/O Pins | — | 84 |
| Propagation Delay (tpd) | — | 10 ns |
| Internal Performance | — | 100 MHz |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V |
| Technology | — | 5.0 V CMOS, EEPROM-based |
| In-System Programmability | — | Yes (IEEE Std. 1149.1 JTAG) |
| Mounting Type | — | Surface Mount |