EPM7128AETC144-7 vs EPM7128AETC144-7N Comparison

Detailed side-by-side comparison of EPM7128AETC144-7 by Intel and EPM7128AETC144-7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7128AETC144-7 EPM7128AETC144-7N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Active
Stock Status In Stock In Stock
Unit Price (USD) $16.40 $39.82
Series MAX 7000A β€”
Programmable Type In-System Programmable (ISP), EEPROM β€”
Number of Macrocells 128 β€”
Number of Logic Array Blocks (LABs) 8 β€”
Number of Usable Gates 2,500 β€”
Number of I/Os 100 β€”
Propagation Delay (tPD) Max 7.5 ns β€”
Maximum Operating Frequency 129.9 MHz 129.9 MHz
Supply Voltage (VCCINT) 3.0 V to 3.6 V 3.3 V
I/O Voltage (MultiVolt) 2.5 V / 3.3 V / 5.0 V tolerant β€”
Operating Temperature 0C to +70C (Commercial) 0C to +70C (commercial)
Package 144-pin TQFP (20x20 mm) 144-pin TQFP
Mounting Type Surface Mount Surface Mount
Programming Interface IEEE 1149.1 JTAG (ByteBlaster / USB-Blaster) β€”
Configuration Memory EEPROM, non-volatile β€”
ISP Endurance 100 cycles typical per macrocell β€”
Process Technology CMOS CMOS, EEPROM-based
RoHS Status [DATA_NEEDED: RoHS status] Compliant
Family β€” MAX 7000A
Device Type β€” CPLD (Complex Programmable Logic Device)
Logic Gates β€” 2500 (2.5K gates)
Macro Cells β€” 128
User I/Os β€” 36 (in 144-pin TQFP)
Pin-to-Pin Delay β€” 7.5 ns
Propagation Delay (tpd) β€” 7.5 ns
Programmability β€” In-System Programmable (ISP) via JTAG
Boundary-Scan Test β€” IEEE Std 1149.1 (JTAG)
Pin-Compatible With β€” MAX 7000S 5.0V family (144-pin TQFP)
Lead-Free β€” Yes

Datasheets & Resources

Browse All Products Create BOM Request Quote