EPM7128ATC100-10 vs EPM7128AETC100-10 Comparison
Detailed side-by-side comparison of EPM7128ATC100-10 by Altera and EPM7128AETC100-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128ATC100-10 - MAX 7000A CPLD, 128 Macrocells, 10ns TQFP-100 | Altera
EPM7128ATC100-10 ObsoleteSpecification Comparison
| Parameter | EPM7128ATC100-10 | EPM7128AETC100-10 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 7000A | MAX 7000A |
| Architecture | Multiple Array MatriX (MAX) | — |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 4 | 8 |
| Usable Gates | 2.5K | 2.5K |
| User I/O Pins | 68 | — |
| Pin-to-Pin Logic Delay | 4.5 ns | — |
| Counter Frequency (max) | 227.3 MHz | — |
| Speed Grade | -10 (10 ns) | — |
| Core Supply Voltage | 3.3 V | — |
| I/O Logic Level Support | 5.0 V / 3.3 V / 2.5 V (MultiVolt) | — |
| Program Memory | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Package | 100-pin TQFP (TC100) | 100-pin TQFP (ET) |
| Mounting Type | Surface Mount | — |
| Operating Temperature | 0C to +70C (commercial) | -40C to +85C (commercial/industrial) |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | Compliant |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| User I/Os | — | 84 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Tolerance | — | 5.0 V tolerant |
| Program Technology | — | EEPROM (in-system programmable) |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| Lifecycle Status | — | Obsolete (migrate to MAX II or MAX V) |