EPM7128ELC84-20 vs EPM7160ELC84-20 Comparison
Detailed side-by-side comparison of EPM7128ELC84-20 by Altera and EPM7160ELC84-20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7128ELC84-20 | EPM7160ELC84-20 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Series | MAX 7000 | — |
| Device Family | EPM7128 (CPLD) | — |
| Number of Macrocells | 128 | — |
| Number of Usable Gates | 2500 | — |
| Number of User I/Os | 68 | — |
| Number of Logic Array Blocks (LABs) | 8 | — |
| Propagation Delay (tPD) | 20 ns | — |
| Maximum Frequency (fCNT) | 62.5 MHz | — |
| Supply Voltage (VCC) | 5 V | 5.0 V |
| Supply Voltage Tolerance | 4.75 V to 5.25 V | — |
| Technology | CMOS, EEPROM-based (non-volatile) | CMOS EEPROM |
| Programmable Interface | IEEE Std. 1149.1 (JTAG) | — |
| Package Type | PLCC-84 (J-Lead, J-bend) | — |
| Mounting Type | Surface Mount (PLCC socket compatible) | Surface Mount (PLCC socket compatible) |
| Operating Temperature | 0C to +70C (commercial) | — |
| RoHS Status | Contains lead (pre-RoHS, SnPb finish) | [DATA_NEEDED: RoHS compliance per specific part marking] |
| Family | — | MAX 7000 |
| Macrocells | — | 160 |
| Logic Array Blocks | — | 4 |
| Usable Gates | — | 3,200 |
| User I/O Pins | — | 64 |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Operating Temperature (Commercial) | — | 0C to +70C |
| Programming Interface | — | IEEE 1149.1 JTAG (ISP) |
| In-System Programmable | — | Yes (5.0-V ISP) |
| Package | — | PLCC-84 (windowed ceramic carrier not applicable - plastic) |
| Architecture | — | Second-generation MAX |
| Global Clock Inputs | — | 4 |
| Logic Element Type | — | EEPROM-based macrocell |