EPM7128SLC84-10 vs EPM7128SLC84-6N Comparison
Detailed side-by-side comparison of EPM7128SLC84-10 by Intel and EPM7128SLC84-6N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7128SLC84-6N - MAX 7000S CPLD, 128 Macro, 6ns, 84-PLCC | Intel
EPM7128SLC84-6N ⚠ Last Time BuySpecification Comparison
| Parameter | EPM7128SLC84-10 | EPM7128SLC84-6N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last Time Buy |
| Family | MAX 7000S | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | — |
| Logic Gates | 2500 | — |
| User I/Os | 68 | — |
| Total Package Pins | 84 | — |
| Package | PLCC-84 (J-lead) | 84-pin PLCC (J-lead) |
| Propagation Delay (tpd) | 10 ns | — |
| Maximum Operating Frequency | 125 MHz | 147.1 MHz |
| Internal Frequency | 250 MHz | — |
| Supply Voltage (VCCINT) | 5 V | — |
| MultiVolt I/O Support | 2.5 V / 3.3 V / 5 V | — |
| Program Memory Type | EEPROM (in-system programmable) | EEPROM |
| JTAG (IEEE 1149.1) | Yes | — |
| Operating Temperature | 0C to +70C (Commercial) | [DATA_NEEDED: operating temperature range] |
| Mounting Type | Surface Mount (J-bend) | — |
| MSL Level | [DATA_NEEDED: MSL level] | — |
| RoHS Status | Non-compliant (contains lead in PLCC) | Non-Compliant (legacy 5V part) |
| Device System Gates | — | 2500 |
| Number of Macro Cells | — | 128 |
| Number of User I/Os | — | 68 |
| Number of Logic Blocks/Elements | — | 8 |
| Number of Global Clocks | — | 2 |
| Product Terms per Macro Cell | — | 32 |
| Pin-to-Pin Delay (Speed Grade) | — | 6 ns |
| Supply Voltage | — | 5 V |
| Process Technology | — | CMOS, EEPROM |
| In-System Programmability | — | Yes (ISP via JTAG) |