EPM7128SLC84-7N vs EPM7128SLC84-15 Comparison

Detailed side-by-side comparison of EPM7128SLC84-7N by Intel and EPM7128SLC84-15 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7128SLC84-7N EPM7128SLC84-15
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last Time Buy
Series MAX 7000S —
Programmable Type In System Programmable (ISP) —
Memory Type EEPROM —
Number of Macrocells 128 —
Number of Logic Elements/Blocks 8 (Logic Array Blocks) —
Number of Usable Gates 2,500 —
Number of I/O Pins 68 —
Propagation Delay (tpd) Max 7.5 ns —
Maximum Operating Frequency 125 MHz —
Counter Speed (Internal) up to 175.4 MHz (family max) —
Supply Voltage (VCCINT) 4.75 V to 5.25 V (5 V nominal) 5 V
Operating Temperature 0 C to +70 C (Commercial) 0C to +70C (commercial)
Package 84-LCC (J-Lead), PLCC-84 84-Pin PLCC (J-Lead, J84)
Mounting Type Surface Mount Surface Mount / Socketed (PLCC-84 socket)
MSL Level [DATA_NEEDED: MSL level] —
RoHS Status Compliant (lead-free 'N' suffix) Non-RoHS (legacy 5V part)
Family — MAX 7000S
Device Type — CPLD - Complex Programmable Logic Device
Macrocells — 128
Usable Gates — 2,500
User I/Os — 68 (in 84-PLCC)
Speed Grade — -15 (15 ns pin-to-pin delay)
Propagation Delay (tPD) — 15 ns
Maximum Internal Frequency (fMAX) — 76.9 MHz
Logic Family / Process — CMOS, 5V, EEPROM
I/O Standard Support — 5.0 V TTL/CMOS (multi-volt I/O compatible with 3.3V)
Programming Interface — JTAG (IEEE Std. 1149.1), in-system programmable
Configuration Memory — Non-volatile EEPROM (instant-on, no boot PROM)

Datasheets & Resources

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